Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment Jan 23, 2025· Haoyuan Wu , Haisheng Zheng , Yuan Pu , Bei Yu · 0 min read Paper GitHub Type Conference paper Publication The Thirteenth International Conference on Learning Representations (ICLR 2025) Last updated on Jan 23, 2025 Design Automation Authors Haoyuan Wu Ph.D. Student ← Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation Jan 23, 2025 Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks Sep 20, 2024 →
